The Flexible Urban Networks - Low Voltage Project (FUN-LV), led by UK Power Networks, won the award for Green IT Project of the Year at the Business Green Leaders Awards 2017. Imperial College London was one of the academic partners within the project.
The push to decarbonise our society means that our electricity distribution network needs to change. FUN-LV aimed to tackle a wide range of issues around this problem through the use of smart technologies that balance the flow of power around a regional electricity grid. They found that these smart technologies can help existing infrastructure to support increased demand and make it easier to connect low carbon technologies and distributed generation in urban areas.
The judging panel commended the project “… thanks to its huge potential impact and impressive carbon savings. Demonstrating that smart grid technologies are ready for action … showed how it is possible to significantly improve the resilience and performance of urban grids in a cost effective way.”
The team within Imperial working on the project are based in the Control and Power group in the Department of Electrical and Electronic Engineering. Their work was on the design of the software algorithm used to determine the power transfer between substations in order to increase network utilisation and postpone building new infrastructure like adding bigger transformers or cables.
Dr Nathaniel Bottrell, from the Control and Power Group, worked on the project “This is a great example of academia working with industry to drive innovation. A concept, first developed in academia to provide a solution to facilitate the uptake of low carbon technologies, has been trialled in a network innovation project. These solutions have the potential to offer lower cost solutions than traditional reinforcement.”
The project was funded by OFGEM’s Low Carbon Network Fund and the other partners were Ricardo PLC, CGI group, GE Energy. Turbo Power Systems designed and manufactured the power electronic hardware and provided technical support in interfacing the algorithm with the hardware.
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